Mark's Synchronous Digital Clock

What's a Synchronous Clock?

Wrist watches and computers keep time by the electrical resonance of a small crystal. Certain crystals physically flex a little bit when you apply a voltage to them, and, as with almost anything that flexes, they have a resonant frequency. When noise is applied to the crystal, its resonant frequencies respond more strongly than others, so if you amplify its output and feed it back in, that resonance is amplified further and further, resulting in a wave of a frequency that's damn close to the crystal's resonance frequency. Crystals can be manufactured to have a resonant frequency that's within a very tight tolerance, so this works pretty well.

A synchronous clock, on the other hand, uses mains power (the power you get from a wall outlet) to keep time. Utility operators (in the US, at least) try very hard to keep this frequency stable and accurate at 60Hz, so much so that if an anomaly (such as a natural disaster) causes the frequency to fluctuate too much in one direction or the other, utility operators will schedule a correction in the opposite direction so that synchronous clocks will return to the correct time. A live map of the mains frequency around the US is on the FNET website.

What's my Synchronous Clock?

Working with mains voltages sounded super fun, not to mention that a clock you built yourself is a great dorm-room decoration. My clock consists of three circuit boards: A power supply board, a logic board (frequency dividers, time presetting), and a display board (7-segment decoders, displays themselves). Each board is a "protoboard", so I really had to get good at building solder bridges. All these parts are in a large glass jar to contain fires in case of a power supply malfunction.

Stage 1: Supplying the power

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In order to "see" the frequency of the mains power, I needed to build a power supply; the DC output from a prebuilt power supply is just…DC. Analyzing the ripple on a DC supply to count frequency is theoretically possible, but highly sensitive to noise. Almost all AC-DC power supplies have at least four fundamental stages:

  1. Efficiently drop most of the voltage.
  2. Rectify the voltage from AC to pulsed DC.
  3. Smooth out the pulsed DC into consistent DC.
  4. Precisely regulate the output voltage to the load's

(not always in this order)

A capacitive power supply shares the last three stages with most other power supplies, but it uses a capacitor instead of a transformer to drop the voltage down to "about" the right level for the rest of the circuit. There are a million articles on the web about how capacitve power supplies work, so I'm not going to explain in detail here. But, to summarize: Capacitors have some AC impedance, and in turn a voltage drop. Yet, they don't dissipate any power; they just alternately store it and return. As a result, capacitors are perfect for dropping most of the voltage from mains power to 5V, as long as you don't need to supply very much current.

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C1 is the main capacitor that the supply is named for. Its reactance at 60Hz is \(\frac{1}{2\pi\cdot{}60\cdot{}5.58\times10^{-6}}=475\Omega\), so it allows 120V/475Ω=0.25A RMS1. The actual current it can deliver continuously is substantially less than this because of voltage drop over other parts of the circuit that invalidate our equation to find the current (it's really about 225mA).

R1 discharges the capacitor to a safe voltage when the circuit is turned off. R2 prevents excessive "inrush" current when the circuit is turned on or off. If the circuit is turned off while mains voltage is at a peak 170V, it creates a huge charging current straight into C1 and C2. Even with R2, I calculated the maximum inrush current at 170V/20Ω=8.5A, but because it's so brief and capacitors are able to handle relatively high current, nothing gets damaged. Without R2, though, I'd be worried about sending tens of amps through those capacitors for any amount of time. You will burn out components without this resistor.

D1-D4 form a full-bridge rectifier that converts AC to pulsed DC. C2 is an output filter capacitor that turns the pulsed DC into more consistent DC2. R3 introduces a voltage drop between the top of the load and the top of the filter capacitor so that the voltage over the filter capacitor is always well over the 5.1V the load wants; this way the load always[citation needed] gets its full 5.1V. Z1 is just a zener diode configured as a shunt voltage regulator; whenever the load doesn't need the full 225mA or so my power supply can deliver, the excess current is "shunted" into this zener to maintain a 5.1V drop over the load.3

Fun Fact: Half-bridge rectifiers don't work with capacitive power supplies. For example:

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This was what my first prototype looked like. The LED flashed brightly when I plugged in the circuit, then stayed lit very dimly (I had a high-value resistor in parallel with the capacitor as well as a small series inrush resistor, and if you want to build this circuit, you should too). Assuming you plug in at an upwards-going zero crossing of the AC waveform, everything starts at zero volts. As AC voltage rises, current flows clockwise until the capacitor charges up to 170V (the peak voltage of US mains power). Then AC voltage drops, but the capacitor has no path to discharge, because current can't flow counterclockwise! So it maintains its 170V drop. AC voltage drops to 0V, and the right side of the cap drops to -170V, then as line voltage drops all the way to -170V, the right side of the cap goes all the way down to -340V! It will never go above 0V again, leaving the LED off.

Stage 1.1: Counting the pulses

Next up is what makes a synchronous clock synchronous: The pulse counter. Mine is on the same board as the power supply. It generates a square wave with the same frequency as line voltage (60Hz in the US).

Getting the pulse input

How do we actually introduce the line signal into our circuit? This is why I built the power supply – so my circuit could escape the sandbox of a normal power supply and see the mains voltage fluctuating. In my case, the easiest way to do that was to connect to just outside of the diode bridge:

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How does this work? If we go just "outside" of a diode bridge, there are two possible states:

  • This side of the diode bridge is currently acting as ground. In this case, it is ~0.5V4 lower than the circuit's main ground because of the diode's forward voltage.
  • This side of the diode bridge is providing the positive voltage for the circuit. In this case, its voltage relative to the virtual ground inside the diode bridge is equal to 5.1V (the zener voltage) + 0.225A * 20Ω (the series resistor inside the bridge) + 0.5V (the drop over the virtual ground diode) = 10.1V or so (I observed it being a bit higher than this).

During each ~16 millisecond period of the mains AC voltage, the diode bridge passes through both states exactly once. Further analysis will reveal that this signal is already roughly a square wave, so all we need is a voltage divider to bring down this 10.1V signal to the 5.1V that my logic components can understand. Right?

First filtering attempt: Schmitt trigger only

After the voltage divider, we have a rough 60Hz square wave from -0.25 to 5.1 volts. However, mains power is noisy, especially in a dorm with plenty of high-current appliances like water heaters, microwaves, and ovens. My first attempt at countering this noise was a CMOS 555 timer configured as an inverting Schmitt trigger by connecting the noisy pulse wave to the 2 and 6 pins, leaving the 7 pin disconnected. The output goes high when the input goes below about 1.7V, and goes low again when the input raises above 3.3V, meaning that a noise would have to be at least a couple volts in amplitude in order to trigger an extra pulse.

Second filtering attempt: Schmitt trigger with low-pass filter

I thought my Schmitt trigger would work pretty well. After all, since the thresholds and triggers are spaced 1/3 of Vcc apart, noise would have to be at least 1/3 of mains voltage amplitude (170V) in order to mess with my trigger, right? Well, then, explain why my clock ran two minutes fast in the first day!

Although the 1.7V of hysteresis on the Schmitt trigger is equal to 1/3 of my logic level supply, mains doesn't need to fluctuate by nearly 1/3 in order to cause that 1.7V change (my assumption would have been correct, however, if I used a transformer-based power supply). Let's say mains is at a zero crossing, when, suddenly there's a 10V spike with negligible rise time. That voltage change propogates across the power supply capacitor instantly, which in turn raises the voltage across the pulse detector by 10V, and, after the voltage divider, the input to the 555 goes up to 5V. Then, let's say that 10V spike subsides while mains is still at the same zero crossing, so the 555 input falls back to 0V. Evidently, my circuit was highly susceptible to mains noise.

Another way to think about it: A capacitive power supply is a bit like a high-pass filter: There's a capacitor in series between the "signal" (mains voltage) and some resistance (the logic, display, etc of the circuit), while we're measuring the voltage in the middle.

This analogy makes sense: We want to attenuate the low frequency mains voltage all the way down from 170V to ~10V over the diode bridge. And, if there were some really low-frequency signals, say that the utility operators decided to switch from AC to DC for April fools' day, the DC would charge up the capacitor, but after it reached full charge, no current would pass through at all. Of course, all the non-linear components in the diode bridge and the load make this analogy tenuous at best, but it explains why a small, high-frequency fluctuation can have such a large effect on the output.

As for solving it? A low-pass filter in the pulse detector circuit, which, continuing the filter analogy above, turns the whole circuit into a band-pass filter configured at pretty close to 60Hz.

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I'm not great with filter math and wanted to make sure that the noise would be attenuated, so I took this opportunity to learn to write Spice netlists and simulate my entire power supply.

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The purple, square-ish line is the input to the 555 Schmitt trigger in the original circuit. The aqua (?) line is with an RC low-pass filter. I simulated noise on the line with ngspice's TRRANDOM voltage source. I used some pretty extreme noise to generate this graph; the original circuit would have counted 4 extra pulses. The low-pass filtered version, however, stays steady. And it works in practice, too: Although I've observed the clock losing or gaining time over the course of a day, it usually "self-corrects" within a few hours.

Stage 2: Dividing the frequency

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This stage was the most complex in terms of the number of components and connections. Most of the frequency division happens on the clearly marked 74HC390 chips. Although these chips are marketed as dual decade counters (that count up through 1001 before rolling back to 0000), a 74390 actually consists of two divide-by-five counters (000, 001, 010, 100, 101, then reset to 000) and two divide-by-two counters (literally toggle flip-flops), each with separate clock inputs. If you connect the divide-by-two output to the divide-by-five clock, it effectively becomes a decade counter. The only thing about this chip that warrants the name "decade counter" is that each pair of divide-by-five and divide-by-two counters shares a reset pin. With 4 counters per chips and a few external NAND gates, I set up arbitrary frequency dividers easily.

First is the divide-by-3600 counter that converts the 60Hz wall pulse to one pulse per minute (1/60 Hz). To make divide-by-3600, I configured one 74HC390 as a divide-by-100 and the other as a divide-by-36. To divide-by-36 I first divide by two, then divide by two again, then divide by 9 using the two remaining divide-by-5 counters and a handful of NAND gates. Next is a normal decade counter for the minutes ones-place. Then, a divide-by-6 counter (once again, with NAND gates) for the minutes tens-place.

The hours ones-place is the most annoying digit. My clock is 12-hour, not 24-hour, so after 12:59 it rolls back to 1:00. Notice that the hours ones place rolls over from 2 back down to 1, not 0. The reset pin on the 74390 obviously resets to 0, though. So, I used a 4029 counter instead; this chip can be preset to a fixed value rather than simply resetting to 0. This made it easy to roll back to 1.

Finally, the hours tens-place and the am/pm indicator are controlled by the divide-by-two counters on a single 74390; these are both just toggles. I planned to use the pulse that resets both hours digits after 12:59 to also reset the am/pm counter, but remembered (after soldering!) that the am/pm indicator should rollover at 12:00, not 1:00! I have always thought it unintuitive that noon is 12:00pm and midnight is 12:00am and it really bit me in the butt here. Luckily, I was able to add the necessary logic by snipping bad connections and adding a diode-based wired-AND gate.

Stage 2.1: Setting the time

The only external control on my clock is a single (insulated) potentiometer dial. When in the counterclockwise detent, the clock runs normally. As you turn it clockwise, the clock starts going faster, up to a maximum speed of about an hour per second.

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The potentiometer controls the frequency of a 555 timer. The output of said timer is connected via what's effectively an OR gate to the clock pin on the minute counter, so each 555 pulse moves the clock forwards one minute (I didn't actually use an OR gate; I was able to construct this logic with less gates by combining the OR logic with the divide-by-3600 logic).

The potentiometer, plus a couple external resistors, forms a voltage divider with a minimum voltage just below 2/3 of Vcc and a maximum voltage near Vcc. This voltage divider is connected to the top of a capacitor that's configured as a 555 timing capacitor. At the minimum voltage, the capacitor will not charge enough to trigger the 555 and the 555's output will stay high. When the knob is turned and the voltage is just over 2/3 of Vcc, the frequency is slow because the capacitor can barely charge up far enough. As the pot is turned further, the frequency continues to increase as the capacitor charges faster and faster. I played around a lot with the values of the fixed resistors to maximize the range of frequencies I could get when adjusting the potentiometer by hand.

Stage 3: Displaying the output

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Not much to see here. Three 4511 7-segment decoders directly drive the LEDs through resistors. Since the hours ones-place (upper leftmost digit) will only ever display 1 or blank, there's no need for another decoder; I just used a small discrete transistor. Although I used 220Ω resistors for all the other segments, I was careful to use slightly more resistance for these two because the voltage drop of the transistor is lower than the voltage drop on the 4511 outputs, even when driving twice as much current!

Reflection

This felt like a pretty massive project to me, and I'm super proud of it! I learned a whole bunch, too:

  • How to make really long solder bridges, even with lead free solder (ugh).
  • How to destroy a multimeter and scare the shit out of yourself (connect it across mains terminals with the red lead plugged into the current jack instead of the voltage jack).
  • How not to destroy an oscilloscope (plug it in using an extension cord with the ground prong removed before measuring things referenced to mains voltages)
  • How to debug a circuit. I have a much better "feel" now for what sorts of problems do and do not tend to happen in a circuit.
  • How to lay out a circuit board. This isn't the first protoboard work I've ever done, but every board I'd built before was small enough that I could plot the entire layout with pen on paper before touching a single wire. I knew my clock would be too complicated to do that, realistically, so I laid things out on-the-fly. Although my circuit boards may look messy, I'm pretty happy with the overall organization, especially on the display board, which is the one I laid out last (look at all those beautiful solder bridges on the back!).
  • How not to give up. I had to make lots of changes to the clock after fully assembling it. For the first couple problems, I really freaked out – they seemed serious, like the am/pm indicator switching at one o'clock instead of twelve – and thought I might have to painfully repair a large swath of my boards to fix these issues. But, after calming down, I discovered that every issue with my clock was fixable without snipping more than a handful of leads – I never had to remove an IC or anything like that. I also had lots of problems with the clock not timing correctly, beyond the mains noise in the pulse counter circuit that I described in detail above. For example, the time-setting system would trigger erroneously and cause the clock to skip certain minutes, such as 10:08 and 12:00. I was stumped for days over this and had to do all sorts of tricks on an oscilloscope to discover it was due to the really high voltage ripple from my power supply, which, when displaying the minutes that required the most digits to be on, got just large enough to mess with the 555 timer.

This project was perfect for my level of skill when I started it. I hope you enjoyed reading about it as much as I enjoyed building it!

Gallery

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Footnotes:

1

When designing the power supply, I first thought 8:58 pm was the highest load. Only after I started testing things did I realize that 0s still require 6 digits to be turned on and that 10:08 would require 2 additional segments to be turned on, an extra 20mA of current (each segment of the display is appreciably bright 10mA). My miscalculation means the power supply can't technically deliver enough power at 10:08pm and certain other times, so the voltage can drop down to 4.9V or so. Luckily, the display doesn't dim noticeably.

2

A 470uF filter capacitor is way too small for this circuit. At peak load, the voltage ripple has an amplitude of nearly half a volt!

3

I haven't looked into it, but I have a strong hunch that linear voltage regulators don't play nice with capacitive power supplies.

4

The diodes I'm using seem to have a lower than normal (0.7V) forward voltage.